The TL284x and TL384x series of control integrated circuits provide the features that are necessary to implement off-line or dc-to-dc fixed-frequency current-mode control schemes with a minimum number of external components. Some of the internally implemented circuits are an undervoltage lockout (UVLO), featuring a start-up current of less than 1 mA, and a precision reference trimmed for accuracy at the error amplifier input. Other internal circuits include logic to ensure latched operation, a pulse-width modulation (PWM) comparator (which also provides current-limit control), and a totem-pole output stage designed to source or sink high-peak current. The output stage, suitable for driving N-channel MOSFETs, is low when it is in the off state.

Major differences between members of these series are the UVLO thresholds and maximum duty-cycle ranges. Typical UVLO thresholds of 16 V (on) and 10 V (off) on the TLx842 and TLx844 devices make them ideally suited to off-line applications. The corresponding typical thresholds for the TLx843 and TLx845 devices are 8.4 V (on) and 7.6 V (off). The TLx842 and TLx843 devices can operate to duty cycles approaching 100%. A duty-cycle range of 0 to 50% is obtained by the TLx844 and TLx845 by the addition of an internal toggle flip-flop, which blanks the output off every other clock cycle.

The TL284x-series devices are characterized for operation from –40℃ to 85℃. The TL384x-series devices are characterized for operation from 0℃ to 70℃.

Supply voltage (see Note 1) (I_CC < 30 mA) .............................................Self limiting
Analog input voltage range, V_I (VFB and ISENSE) .............................–0.3 V to 6.3 V
Output voltage, V_O (OUTPUT) .............................................................................35 V
Input voltage, V_I, (VC, D package only) ..............................................................35 V
Supply current, I_CC ..........................................................................................30 mA
Output current, I_O .............................................................................................±1 A
Error amplifier output sink current ...................................................................10 mA
Package thermal impedance, θ_JA (see Notes 2 and 3): D package ................86℃/W
                                                                                      D-8 package .............97℃/W
                                                                                      P package .................85℃/W
Virtual junction temperature range, T_J .....................................................0℃to 150℃
Output energy (capacitive load) ..........................................................................5 μJ
Lead temperature, 1,6 mm (1/16 inch) from case for 10 seconds .....................260℃
Storage temperature range, T_stg ........................................................–65℃to 150℃

† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTES: 1. All voltages are with respect to the device GND terminal.
            2. Maximum power dissipation is a function of T_J(max), θ_JA, and T_A. The maximum allowable
                power dissipation at any allowable ambient temperature is P_D = (T_J(max) – T_A)/θ_JA. Operating at
                the absolute maximum T_J of 150℃ can impact reliability.
           3. The package thermal impedance is calculated in accordance with JESD 51. recommended
               operating conditions